1. Field of the Invention
The disclosure relates to using multiphase conversion systems for decomposing a high frequency incoming signal. More specifically, the disclosure relates to a method and apparatus for decomposing a high frequency RF signal into several low frequency signals, or digital data streams, without loss of any information and without the use of extraneous circuit components such as local oscillators, mixers or offset phase-locked loops.
2. Description of Related Art
Many RF communication systems require converting an incoming RF signal into a digital representation of the signal for further processing. The signal processor must also detect the frequency and the phase of the incoming signal and produce another signal that has a fixed relationship to the phase and frequency of the incoming signal. In conventional signal processing, a mixer and an offset phase-locked loop (“PLL”) are frequently used to down-convert the RF signal into a low frequency, or baseband, signal which is suitable for signal processing. A conventional down-converting process requires multiple processing elements which can consume an ever increasing portion of the circuit's footprint and can be otherwise inefficient.
As the size of electronic radio devices decreases, the need for smaller integrated chip (“IC”) processors increases. High integration and low power consumption are usually keys to the success of future mobile communication ICs. Consequently, digital implementation is favored over conventional analog implementation as the latter provides a smaller footprint, lower power consumption and a higher signal-to-noise ratio.
Conventional approaches to down-converting a high frequency signal fall into two categories. The first type of implementation uses a mixer and a local oscillator (“LO”) to convert the high frequency signal to a low frequency signal. This implementation is shown in FIG. 1, where high frequency input signal S is directed to phase detector 110. Phase detector 110 detects an initial signal phase and directs the signal S to low pass filter (“LPF”) 120. The filtered signal is then directed to voltage-controlled oscillator (“VCO”) 130. The voltage input to VCO 130 is not shown. The output of VCO 130 and local oscillator (“LO”) 140 are directed to mixer 150. Mixer 150 convolves the two signals and directs the resulting signal to frequency-to-digital converter (FDC) 160. FDC 160 converts the convolved signal into a digital word. The digital word can represent the frequency information of the down-converted signal. The frequency information is used by phase/frequency detector 110 to iteratively determine the phase of input signal S. A drawback of the circuit of FIG. 1 is the need for a mixer 150 and a local oscillator 140 which cumulatively increase the circuit's footprint and render the process inefficient.
A second type of conventional down-converters implements a so-called “divide-by-N” algorithm. FIG. 2 schematically illustrates one such down-converting circuit. In FIG. 2, a frequency input signal S is directed to a phase detector 210. The signal is then directed to LPF 220. The resultant filtered signal is directed to VCO 230. The oscillating signal is then fed to the divide-by-N logic circuit 240, where the high frequency signal is reduced to a low frequency signal by implementing a divide-by-N algorithm. However, the circuitry and algorithm may degrade the signal-to-noise ratio (“SNR”) by about 10 log10N. The degraded SNR can adversely affect signal processing and speed. These problems are even more pronounced when dealing with a multiphase VCO system such as a rotary travelling wave oscillator (“RTWO”).
Therefore, there is a need for an improved method and apparatus for decomposing a high frequency signal to one or more low frequency digital data streams without requiring extraneous circuit elements or degrading the SNR.